| Advances, challenges and opportunities in 3D CMOS sequential integration P Batude, M Vinet, B Previtali, C Tabone, C Xu, J Mazurier, O Weber, ... 2011 International Electron Devices Meeting, 7.3. 1-7.3. 4, 2011 | 419 | 2011 |
| Method of making a 3D integrated circuit B Sklenard, P Batude US Patent 9,018,078, 2015 | 213 | 2015 |
| 3DVLSI with CoolCube process: An alternative path to scaling P Batude, C Fenouillet-Beranger, L Pasini, V Lu, F Deprat, L Brunet, ... 2015 Symposium on VLSI Technology (VLSI Technology), T48-T49, 2015 | 157 | 2015 |
| Understanding RRAM endurance, retention and window margin trade-off using experimental results and simulations C Nail, G Molas, P Blaise, G Piccolboni, B Sklenard, C Cagli, M Bernard, ... 2016 IEEE International Electron Devices Meeting (IEDM), 4.5. 1-4.5. 4, 2016 | 139 | 2016 |
| 3D Sequential Integration: Application-driven technological achievements and guidelines P Batude, L Brunet, C Fenouillet-Beranger, F Andrieu, JP Colinge, ... 2017 IEEE International Electron Devices Meeting (IEDM), 3.1. 1-3.1. 4, 2017 | 91 | 2017 |
| 3D sequential integration opportunities and technology optimization P Batude, B Sklenard, C Fenouillet-Beranger, B Previtali, C Tabone, ... IEEE International Interconnect Technology Conference, 373-376, 2014 | 72 | 2014 |
| Monolithic 3D integration: A powerful alternative to classical 2D scaling M Vinet, P Batude, C Fenouillet-Beranger, F Clermidy, L Brunet, ... 2014 SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S …, 2014 | 71 | 2014 |
| Linear hyperfine tuning of donor spins in silicon using hydrostatic strain J Mansir, P Conti, Z Zeng, JJ Pla, P Bertet, MW Swift, CG Van de Walle, ... Physical Review Letters 120 (16), 167701, 2018 | 56 | 2018 |
| Endurance/retention trade off in HfOx and TaOx based RRAM M Azzaz, E Vianello, B Sklenard, P Blaise, A Roule, C Sabbione, ... 2016 IEEE 8th international memory workshop (IMW), 1-4, 2016 | 54 | 2016 |
| Hybrid‐RRAM toward next generation of nonvolatile memory: coupling of oxygen vacancies and metal ions G Sassine, C Nail, P Blaise, B Sklenard, M Bernard, R Gassilloud, A Marty, ... Advanced Electronic Materials 5 (2), 1800658, 2019 | 52 | 2019 |
| HfO2/Ti Interface Mediated Conductive Filament Formation in RRAM: An Ab Initio Study B Traore, P Blaise, B Sklénard, E Vianello, B Magyari-Köpe, Y Nishi IEEE Transactions on Electron Devices 65 (2), 507-513, 2018 | 37 | 2018 |
| Reduction of Monoclinic HfO2: A Cascading Migration of Oxygen and Its Interplay with a High Electric Field B Traoré, P Blaise, B Sklénard The Journal of Physical Chemistry C 120 (43), 25023-25029, 2016 | 31 | 2016 |
| Understanding Si (111) solid phase epitaxial regrowth using Monte Carlo modeling: Bi-modal growth, defect formation, and interface topology I Martin-Bragado, B Sklenard Journal of Applied Physics 112 (2), 2012 | 28 | 2012 |
| A review of low temperature process modules leading up to the first (≤ 500° C) planar FDSOI CMOS devices for 3-D sequential integration C Fenouillet-Beranger, L Brunet, P Batude, L Brevard, X Garros, M Cassé, ... IEEE Transactions on Electron Devices 68 (7), 3142-3148, 2021 | 26 | 2021 |
| High performance CMOS FDSOI devices activated at low temperature L Pasini, P Batude, J Lacord, M Casse, B Mathieu, B Sklenard, FP Luce, ... 2016 IEEE Symposium on VLSI Technology, 1-2, 2016 | 20 | 2016 |
| High performance low temperature activated devices and optimization guidelines for 3D VLSI integration of FD, TriGate, FinFET on insulator L Pasini, P Batude, M Cassé, B Mathieu, B Sklenard, FP Luce, S Reboh, ... 2015 Symposium on VLSI Technology (VLSI Technology), T50-T51, 2015 | 20 | 2015 |
| Low temperature FDSOI devices, a key enabling technology for 3D sequential integration P Batude, B Sklenard, C Xu, B Previtali, B De Salvo, M Vinet 2013 International Symposium on VLSI Technology, Systems and Application …, 2013 | 18 | 2013 |
| Optical vs electronic gap of hafnia by ab initio Bethe-Salpeter equation B Sklénard, A Dragoni, F Triozon, V Olevano Applied Physics Letters 113 (17), 2018 | 17 | 2018 |
| An atomistic investigation of the impact of in-plane uniaxial stress during solid phase epitaxial regrowth B Sklenard, JC Barbe, P Batude, P Rivallin, C Tavernier, S Cristoloveanu, ... Applied Physics Letters 102 (15), 2013 | 17 | 2013 |
| First demonstration of low temperature (≤ 500° C) CMOS devices featuring functional RO and SRAM bitcells toward 3D VLSI integration C Fenouillet-Beranger, L Brunet, P Batude, L Brevard, X Garros, ... 2020 IEEE Symposium on VLSI Technology, 1-2, 2020 | 16 | 2020 |
Jing LICEA Leti, Grenoble, FranceVerified email at cea.fr
