| Parameter-efficient fine-tuning for large models: A comprehensive survey Z Han, C Gao, J Liu, J Zhang, SQ Zhang arXiv preprint arXiv:2403.14608, 2024 | 202 | 2024 |
| Thundervolt: enabling aggressive voltage underscaling and timing error resilience for energy efficient deep learning accelerators J Zhang, K Rangineni, Z Ghodsi, S Garg Proceedings of the 55th Annual Design Automation Conference, 1-6, 2018 | 175 | 2018 |
| Analyzing and mitigating the impact of permanent faults on a systolic array based neural network accelerator JJ Zhang, T Gu, K Basu, S Garg 2018 IEEE 36th VLSI Test Symposium (VTS), 1-6, 2018 | 171 | 2018 |
| Fault-tolerant systolic array based accelerators for deep neural network execution JJ Zhang, K Basu, S Garg IEEE Design & Test 36 (5), 44-53, 2019 | 82 | 2019 |
| Logic locking for secure outsourced chip fabrication: A new attack and provably secure defense mechanism ME Massad, J Zhang, S Garg, MV Tripunitara arXiv preprint arXiv:1703.10187, 2017 | 75 | 2017 |
| {Model-Switching}: Dealing with Fluctuating Workloads in {Machine-Learning-as-a-Service} Systems J Zhang, S Elnikety, S Zarar, A Gupta, S Garg 12th USENIX Workshop on Hot Topics in Cloud Computing (HotCloud 20), 2020 | 56 | 2020 |
| Building robust machine learning systems: Current progress, research challenges, and opportunities JJ Zhang, K Liu, F Khalid, MA Hanif, S Rehman, T Theocharides, A Artussi, ... Proceedings of the 56th Annual Design Automation Conference 2019, 1-4, 2019 | 52 | 2019 |
| RecPipe: Co-designing Models and Hardware to Jointly Optimize Recommendation Quality and Performance U Gupta, S Hsia, J Zhang, M Wilkening, J Pombra, HHS Lee, GY Wei, ... 2021 54th Annual IEEE/ACM International Symposium on Microarchitecture …, 2021 | 42 | 2021 |
| Opencgra: Democratizing coarse-grained reconfigurable arrays C Tan, NB Agostini, J Zhang, M Minutoli, VG Castellana, C Xie, T Geng, ... 2021 IEEE 32nd International Conference on Application-specific Systems …, 2021 | 33 | 2021 |
| Power efficiency for hardware/software partitioning with time and area constraints on mpsoc E Sha, L Wang, Q Zhuge, J Zhang, J Liu International Journal of Parallel Programming 43, 381-402, 2015 | 33 | 2015 |
| Energy optimization for data allocation with hybrid SRAM+ NVM SPM Y Wang, K Li, J Zhang, K Li IEEE Transactions on Circuits and Systems I: Regular Papers 65 (1), 307-318, 2017 | 32 | 2017 |
| FATE: Fast and accurate timing error prediction framework for low power DNN accelerator design J Zhang, S Garg 2018 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-8, 2018 | 31 | 2018 |
| Bridging python to silicon: The soda toolchain NB Agostini, S Curzel, JJ Zhang, A Limaye, C Tan, V Amatya, M Minutoli, ... IEEE Micro 42 (5), 78-88, 2022 | 28 | 2022 |
| A 12nm agile-designed SoC for swarm-based perception with heterogeneous IP blocks, a reconfigurable memory hierarchy, and an 800MHz multi-plane NoC T Jia, P Mantovani, MC Dos Santos, D Giri, J Zuckerman, EJ Loscalzo, ... ESSCIRC 2022-IEEE 48th European Solid State Circuits Conference (ESSCIRC …, 2022 | 25 | 2022 |
| CompAct: On-chip Compression of Activations for Low Power Systolic Array Based CNN Acceleration J Zhang, P Raj, S Zarar, A Ambardekar, S Garg ACM Transactions on Embedded Computing Systems (TECS) 18 (5s), 1-24, 2019 | 25 | 2019 |
| Assessing robustness of hyperdimensional computing against errors in associative memory S Zhang, R Wang, JJ Zhang, A Rahimi, X Jiao 2021 IEEE 32nd International Conference on Application-specific Systems …, 2021 | 22 | 2021 |
| Efficient fault-tolerant scheduling on multiprocessor systems via replication and deallocation J Zhang, EHM Sha, Q Zhuge, J Yi, K Wu International Journal of Embedded Systems 6 (2), 216-224, 2014 | 22 | 2014 |
| Millimeter wave wireless assisted robot navigation with link state classification M Yin, AK Veldanda, A Trivedi, J Zhang, K Pfeiffer, Y Hu, S Garg, E Erkip, ... IEEE Open Journal of the Communications Society 3, 493-507, 2022 | 21 | 2022 |
| Enabling timing error resilience for low-power systolic-array based deep learning accelerators J Zhang, Z Ghodsi, S Garg, K Rangineni IEEE Design & Test 37 (2), 93-102, 2019 | 21 | 2019 |
| 22.9 A 12nm 18.1 TFLOPs/W sparse transformer processor with entropy-based early exit, mixed-precision predication and fine-grained power management T Tambe, J Zhang, C Hooper, T Jia, PN Whatmough, J Zuckerman, ... 2023 IEEE International Solid-State Circuits Conference (ISSCC), 342-344, 2023 | 18 | 2023 |
Siddharth GargInstitute Associate Professor, New York UniversityBestätigte E-Mail-Adresse bei nyu.edu
